Smart GaN platform: Performance & challenges

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ID: 269697
2017
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Abstract
This paper explores the next stage of GaN power devices with 2-level integration of peripheral low voltage active and passive devices. The 1st level consists of protection/control/driving circuits, which potentially improves the performance and overcomes the challenges to the power devices. The 2nd level integration has high-low side on-chip integration on a 100V technology platform. The challenge of channel modulation due to substrate bias sharing is effectively eliminated by the invented new scheme. The system efficiency of DC-DC buck converter using such scheme is enhanced with lower on-state resistance and good stability.
Reference Key
kalnitsky20172017smart Use this key to autocite in the manuscript while using SciMatic Manuscript Manager or Thesis Manager
Authors Chun-Lin Tsai, Yun-Hsiang Wang, M.-H. Kwan, P.-C. Chen, F.-W. Yao, S.-C. Liu, J.-L. Yu, C.-L. Yeh, R.-Y. Su, W. Wang, W.-C. Yang, K.-Y. Wong, Y.-S. Lin, M.-C. Lin, H.-Y. Wu, C.-M. Chen, C.-Y. Yu, C.-B. Wu, M.-H. Chang, J.-S. You, T.-M. Huang, S.-P. Wang, L. Y. Tsai, Chan-Hong Chern, H. C. Tuan, Alex Kalnitsky
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Journal 2017 IEEE International Electron Devices Meeting (IEDM)
Year 2017
DOI
10.1109/iedm.2017.8268488
URL
https://sciprofiles.com/publication/view/ebd6b5794bcd8ddea30026dfb4268372
Keywords
wide band gap semiconductors power transistors rectifiers aluminum gallium nitride hafnium electrostatic discharges

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