a new low-voltage, low-power and high-slew rate cmos unity-gain buffer

Clicks: 101
ID: 259702
2014
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Abstract
Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in literature. It is thus suitable for low-voltage and low-power stages requiring low bias currents. These buffers have been simulated using 0.5µm CMOS Technology models provided by IBM. The buffer consumes 20µA from a 0.9V supply and has a bandwidth of 50MHz with a 18pF load. It has a slew rate of 9.8V/µs and power consumption of 42µw
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piry2014iraniana Use this key to autocite in the manuscript while using SciMatic Manuscript Manager or Thesis Manager
Authors ;M. Piry;M. Khanjani Moaf;P. Amiri
Journal international journal of corrosion
Year 2014
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