Reducing the Short Channel Effect of Transistors and Reducing the Size of Analog Circuits

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ID: 7698
2019
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Abstract
Analog integrated circuits never follow the Moore’s Law. This is particularly right for passive component. Due to the Short Channel Effect, we have to implement longer transistor, especially for analog cell. In this paper, we propose a new topology using some advantages of the FDSOI (Fully Depleted Silicon on Insulator) technology in order to reduce the size of analog cells. First, a current mirror was chosen to illustrate and validate a new design. Measured currents, with 35nm transistor length, have validated our new cross-coupled back-gate topology. Then, a VCRO (Voltage Controlled Ring Oscillator) based on complementary inverter is also used to remove passive components reducing the size of the circuit.
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zhaopeng2019reducingactive Use this key to autocite in the manuscript while using SciMatic Manuscript Manager or Thesis Manager
Authors Wei, Zhaopeng;Jacquemod, Gilles;Leduc, Yves;Foucauld, Emeric de;Prouvee, Jerome;Blampey, Benjamin;Wei, Zhaopeng;Jacquemod, Gilles;Leduc, Yves;Foucauld, Emeric de;Prouvee, Jerome;Blampey, Benjamin;
Journal active and passive electronic components
Year 2019
DOI
10.1155/2019/4578501
URL
https://www.hindawi.com/journals/apec/2019/4578501/abs/
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