Bus Based Synchronization Method for CHIPPER Based NoC

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ID: 53040
2016
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Abstract
Network on Chip (NoC) reduces the communication delay of System on Chip (SoC). The main limitation of NoC is power consumption and area overhead. Bufferless NoC reduces the area complexity and power consumption by eliminating buffers in the traditional routers. The bufferless NoC design should include live lock freeness since they use hot potato routing. This increases the complexity of bufferless NoC design. Among the available propositions to reduce this complexity, CHIPPER based bufferless NoC is considered as one of the best options. Live lock freeness is provided in CHIPPER through golden epoch and golden packet. All routers follow some synchronization method to identify a golden packet. Clock based method is intuitively followed for synchronization in CHIPPER based NoCs. It is shown in this work that the worst-case latency of packets is unbearably high when the above synchronization is followed. To alleviate this problem, broadcast bus NoC (BBus NoC) approach is proposed in this work. The proposed method decreases the worst-case latency of packets by increasing the golden epoch rate of CHIPPER.
Reference Key
muralidharan2016busscientific Use this key to autocite in the manuscript while using SciMatic Manuscript Manager or Thesis Manager
Authors Muralidharan, D.;Muthaiah, R.;
Journal scientific programming
Year 2016
DOI
DOI not found
URL
http://dx.doi.org/10.1155/2016/1907521
Keywords
Biology (General) Medicine (General) Medicine Engineering (General). Civil engineering (General) Technology Science computer software

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