1-bit full adder in perpendicular nanomagnetic logic using a novel 5-input majority gate
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ID: 134694
2014
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Abstract
In this paper, we show that perpendicular Nanomagnetic Logic (pNML) is particularly suitable to realize threshold logic gate (TLG)-based circuits. Exemplarily, a 1-bit full adder circuit using a novel 5-input majority gate based on TLGs is experimentally demonstrated. The theory of pNML and its extension by TLGs is introduced, illustrating the great benefit of pNML. Majority gates based on coupling field superposition enable weighting each input by its geometry and distance to the output. Only 5 magnets, combined in two logic gates with a footprint of 1:95 µm2 and powered by a perpendicular clocking field, are required for operation. MFM and magneto-optical measurements demonstrate the functionality of the fabricated structure. Experimental results substantiate the feasibility and the benefits of the combination of threshold logic with pNML.
| Reference Key |
stephan2014epj1-bit
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|---|---|
| Authors | ;Breitkreutz Stephan;Eichwald Irina;Kiermaier Josef;Papp Adam;Csaba György;Niemier Michael;Porod Wolfgang;Schmitt-Landsiedel Doris;Becherer Markus |
| Journal | utilitas mathematica |
| Year | 2014 |
| DOI |
10.1051/epjconf/20147505001
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| URL | |
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