Rapid Prototyping of Parallel Reconfigurable Instruction Set Processor for Efficient Real-Time Image Processing

Clicks: 160
ID: 108527
2017
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noauthorfound2017rapidarchitectureaware Use this key to autocite in the manuscript while using SciMatic Manuscript Manager or Thesis Manager
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Journal architecture-aware optimization strategies in real-time image processing
Year 2017
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10.1002/9781119467243.ch3
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